znbg4003 znbg4003 document number: ds35007 rev. 1 - 2 1 of 7 www.diodes.com august 2010 ? diodes incorporated new product a product line o f diodes incorporated 4 stage fet lna bias controller summary the znbg4003 is a four stage depletion mode fet bias controller intended primarily for satellite low noise block?s (lnb?s), but its also suitable for other lna applications such as those in found in pmr?s and microwave links. the znbg4003 provides each fet with a negative gate voltage and positive drai n voltage with user programmable drain current. features ? four stage fet bias controller ? operating range of 5.0v to 8.0v ? fet drain voltages set at 2.0v ? fet drain current selectable from 0 to 15ma ? allows first and second stage fets to be run at different (optimum) drain currents ? fet drain voltages and curr ents stable over temperature ? fets protected against overstress during power-up and power-down. ? internal negative supply generator allowing single supply operation (available for external use) ? low external component count pin assignments applications ? two single type twin lnb?s ? twin lnb?s ? quad lnb?s ? microwave links ? pmr and cellular telephone systems single universal lnb system diagram top view bottom view c sub g2 v cc gnd g3 d2 v cc g4 r cal1 d4 d3 d1 g1 c sub r cal2 c nb2 c nb1 ? ho rizo ntal zxhf 5002 zabg 6002 zxhf 5002 zabg 4002 vertic al gain stages gaas fet?s down converter if switching, gain and control ho rizo ntal zxhf 5002 zabg 6002 zxhf 5002 znbg 4003 vertic al gain stages gaas fet?s down converter if switching, gain and control
znbg4003 znbg4003 document number: ds35007 rev. 1 - 2 2 of 7 www.diodes.com august 2010 ? diodes incorporated new product a product line o f diodes incorporated device description the znbg series of devices ar e designed to meet the bias requirements of gaas and hemt fets commonly used in satellite receiver lnbs with a minimum of external components. the znbg4003 provides four fet bias stages, arranged in two pairs of two. resistors connected to pins rcal1 and rcal2 set the fet drain currents of each pair over the range of 0 to 15ma, allowing input fets to be biased for optimum noise and amplifier fets for optimum gain. drain voltages of all stages are set at 2.0v. the drain supplies are current limited to approximately 5% above the operating currents set by the rcal resistors. depletion mode fets require a negative voltage bias supply when operated in grounded source circuits. the znbg4003 includes an integrated switched capacitor dc-dc converter generating a regulated output of -2.5v to allow single supply operation. these devices are unconditionally stable over the full working temperature with the fets in pl ace, subject to the inclusion of the recommended gate and drain capacitors. these ensure rf stability and minimal injected noise. it is possible to use less than the devices full complement of fet bias controls, unused drain and gate connections can be left open circuit without affecting operation of the remaining bias circuits. to protect the external fets the circuits have been designed to ensure that, under any conditions including power up/down transients, the gate drive from t he bias circuits cannot exceed -3v. additionally each stage has its own individual current limiter. furthermore if the negative rail experiences a fault condition, such as overload or short circuit, the drain supply to the fets will shut down avoiding excessive current flow. to minimise pcb space znbg4003 is packaged in the 16 pin 3mm x 3mm qfn package. device operating temperature is -40c to 85c to suit a wide range of environmental conditions.
znbg4003 znbg4003 document number: ds35007 rev. 1 - 2 3 of 7 www.diodes.com august 2010 ? diodes incorporated new product a product line o f diodes incorporated maximum ratings parameter rating unit supply voltage -0.6 to +10 v supply current 80 ma power dissipation 500 mw operating temperature range -40 to +85 c storage temperature range -40 to +150 c electrical characteristics ( measured at t amb = 25c, v cc = 5.0v (note 1), r cal 1 = r cal 2 = 39k (setting i d to 10ma) unless otherwise stated) parameter conditions symbol min. typ. max. unit operating voltage range (note 1) v cc 4.75 8.0 v supply current i d1 = i d2 = i d3 = i d4 = 0 i cc 1.8 4.5 ma i d1 = i d2 = i d3 = i d4 = 10ma i cc ( l ) 43 45 ma substrate voltage i csub = 0 v csub -3.0 -2.65 -2.0 v i csub = -100ua v csub ( l ) -2.55 -1.9 v oscillator frequency f osc 150 240 600 khz gate characteristics gate (g1 to g4) current range i g -100 +500 ua voltage low i d = 12ma, i g = -10ua v g ( l ) -3.0 -2.5 -2.0 v voltage high i d = 8ma, i g = 0 v g ( h ) 0 0.7 1.0 v drain characteristics drain (d1 to d4) current range i d 0 15 ma current operating standard application circuit i d ( op ) 8 10 12.5 ma voltage operating i d = 10ma v d ( op ) 1.8 2.0 2.2 v delta i d vs v cc v cc = 5.0 to 8.0v di d /dv cc 1.2 %/v delta i d vs t op t op = -40c to +85c di d /dt op 0.09 %/c delta v d vs v cc v cc = 5.0 to 8.0v dv d /dv cc 0.08 %/v delta v d vs t op t op = -40c to +85c dv d /dt op 110 ppm/c output noise drain voltage c gate-gnd = 10nf, c drain-gnd = 10nf v d(noise) 0.02 vpk-pk gate voltage c gate-gnd = 10nf, c drain-gnd = 10nf v g(noise) 0.005 vpk-pk notes: 1. the two vcc pins are internally connected, only one of the pins needs to be powered for the device to function. see a pplications section for further information. 2. esd sensitive, handling precautions are recommended. 3. the negative bias voltages are generated on-chip us ing an internal oscillator. two external capacitors, c nb and c sub of value 47nf are required for this purpose. 4. the package (qfn1633) exposed pad must either be connected to csub or left open circuit. 5. the characteristics are measured using two external reference resistors r cal1 and r cal2 of value 39k , wired from pins r cal1/2 to ground. resistor r cal1 sets the drain current of fets 1 and 3, resistor r cal2 sets the drain currents of fets 2 and 4. 6. noise voltage measurements are made with fets and gate and drain capacitors of value 10nf in place. noise voltages are not measured in production.
znbg4003 znbg4003 document number: ds35007 rev. 1 - 2 4 of 7 www.diodes.com august 2010 ? diodes incorporated new product a product line o f diodes incorporated typical characteristics ( measured at t amb = 25c, v cc = 5.0v) applications circuit ? jf1 vcc l* l* c* c* c1 10nf c2 10nf cnb 47nf csub 47nf rcal2 39k * stripline elements znbg4003 rcal1 39k g2 cnb1 vcc gnd cnb2 g1 d3 vcc d1 g3 d2 d4 csub rc al2 g4 rcal1
znbg4003 znbg4003 document number: ds35007 rev. 1 - 2 5 of 7 www.diodes.com august 2010 ? diodes incorporated new product a product line o f diodes incorporated applications information above is a partial applications circuit for the znbg4003 showing all external components needed for biasing one of the four fet stages available. each bias stage is provided with a gate and drain pin. the drain pin provides a regulated 2.0v supply that includes a drain current monitor. the drain current taken by the external fet is com pared with a user selected level, generatin g a signal that adjusts the gate vo ltage of the fet to obtain the required drain cu rrent. if for any reason, an attempt is made to draw more than the user set drain current from the drain pin, the drain voltage will be reduced to ensure excess current is not take n. the gate pin drivers are also current limited. the bias stages are split up into two pairs, with the drain current of each pair set by an external r cal resistor. r cal 1 sets the drain currents of stages 1 and 3, whilst r cal 2 sets the drain currents of st ages 2 and 4. this allows the opt imisation of drain currents for differing tasks such as input stages where noise can be critical and later amplifier stages wher e gain may be more important. a graph showing the relationship between the value of r cal and i d is provided in the typical characteristics section of this datasheet. the znbg4003 includes a switched capacitor dc-dc converter that is used to generate the negative supply required to bias depletion mode fets used in common source circuit configuration as shown above. this converter uses two external capacitors, c nb the charge transfer capacitor and c sub the output reservoir capacitor. the circuit provides a regulated -2.5v supply both for gate driver use and for external use if re quired (for extra discrete bias stages, mixer bias, local oscillator bias etc.). the -2.5v supply is available from the c sub pin. if any bias stages are not required, their gate and drain pins may be left open circuit. if all bias stages associated with an r cal resistor are not required, then th is resistor may be omitted. to ease pcb layout, the pinout for the znbg4003 includes two vcc pins. these pins are internally connected so only one of the pins needs to be powered for the device to function. it is proba ble that the extra pin will help avoid the need for trace cross -over components or ground plane disruption from reverse side pcb links. note that the exposed pad of t he package must be either left floating or connected to csub. package outline dimensions note: controlling dimensions are in millimetres. a pproximate dimensions are provided in inches. the package appearance may vary as shown, for further details please contact your local diodes sales office. qfn16 3x3 dim min max a 0.55 0.65 a1 0.00 0.05 a3 0.15 typ b 0.18 0.28 d 2.95 3.05 d2 1.40 1.60 e 0.50 bsc e 2.95 3.05 e2 1.40 1.60 l 0.35 0.45 z 0.625 typ all dimensions in mm e d e2 e b z d2 l a a3 a1 pin #1 id
znbg4003 znbg4003 document number: ds35007 rev. 1 - 2 6 of 7 www.diodes.com august 2010 ? diodes incorporated new product a product line o f diodes incorporated ordering information device package reel size (inches) tape width (mm) quantity (per reel) ZNBG4003JA16TC qfn1633 13 8 3000 marking information znbg 4003 yyww pin 1 part name date code ye ar/ we ek
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